DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS
Krzysztof Kasiński
krzysztof.kasinski@agh.edu.plAGH University of Science and Technology, Cracov (Poland)
Abstract
This paper presents the design of a low-power comparator for timestamping purposes in multichannel integrated circuit for silicon strip detectors’ readout. A brief introduction to an analog front-end electronics with two signal paths is presented. Moreover, issues regarding accuracy of timestamp determination and details of 3-stage comparator architecture are included.
Keywords:
discriminator, multichannel integrated circuits, strip detectors, microelectronicsReferences
Allen P., Holberg D.: CMOS Analog Circuit Design. Oxford University Press, 2011.
Google Scholar
Gryboś P.: Front-end electronics for multichannel semiconductor detector systems. Institute of Electronic Systems. Warsaw University of Technology, 2010.
Google Scholar
Spieler H.: Semiconductor detector systems. Oxford University Press, 2005.
DOI: https://doi.org/10.1093/acprof:oso/9780198527848.001.0001
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Authors
Krzysztof Kasińskikrzysztof.kasinski@agh.edu.pl
AGH University of Science and Technology, Cracov Poland
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