DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS

Main Article Content

DOI

Krzysztof Kasiński

krzysztof.kasinski@agh.edu.pl

Abstract

This paper presents the design of a low-power comparator for timestamping purposes in multichannel integrated circuit for silicon strip detectors’ readout. A brief introduction to an analog front-end electronics with two signal paths is presented. Moreover, issues regarding accuracy of timestamp determination and details of 3-stage comparator architecture are included.

Keywords:

discriminator, multichannel integrated circuits, strip detectors, microelectronics

References

Article Details

Kasiński, K. . (2013). DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS. Informatyka, Automatyka, Pomiary W Gospodarce I Ochronie Środowiska, 3(1), 25–28. https://doi.org/10.35784/iapgos.1434