DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS
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Published:
Feb 14, 2013
Issue Vol. 3 No. 1 (2013)
Articles
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SPECIALIZED SYMBOLIC COMPUTATION FOR STEADY STATE PROBLEMS
5-8
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CONSTRUCTION AND VERIFICATION OF MATHEMATICAL MODEL OF MASS SPECTROMETRY DATA
9-14
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VISUALIZATION OF ANTENNA'S PARAMETERS SIMULATED WITH NEC-2
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IMPACT OF DIRICHLET BOUNDARY CONDITION ON CALCULATION RATE AND STABILITY DURING EDDY CURRENT MODELLING USING ELECTRIC SCALAR POTENTIAL
19-20
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NOISE ANALYSIS OF THE RECORDING CHANNEL DEDICATED TO THE MULTICHANNEL INTEGRATED CIRCUITS FOR NEUROBIOLOGY EXPERIMENTS
21-23
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DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS
25-28
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4 CHANNEL LED MODULE FOR USE IN GROW LIGHTING SYSTEM
29-33
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AN INDUSTRIAL CAPACITANCE TOMOGRAPHY APPLICATION FOR TWO-PHASE FLOWS
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ANALYSIS OF THE EFFECT OF CONCRETE BASE ROUGHNESS ON THE PULL-OFF ADHESION OF THE TOPPING LAYER
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MICROBLOGGING APPLICATION-HANDSHAKE
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MODELING AND ANALYSIS OF MAGNETIC FIELD FOR UNTYPICAL COORDINATE SYSTEMS
47-48
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Abstract
This paper presents the design of a low-power comparator for timestamping purposes in multichannel integrated circuit for silicon strip detectors’ readout. A brief introduction to an analog front-end electronics with two signal paths is presented. Moreover, issues regarding accuracy of timestamp determination and details of 3-stage comparator architecture are included.
Keywords:
discriminator, multichannel integrated circuits, strip detectors, microelectronics
Article Details
Kasiński, K. . (2013). DISCRIMINATOR FOR TIMESTAMPING IN STRIP DETECTOR READOUT INTEGRATED CIRCUITS. Informatyka, Automatyka, Pomiary W Gospodarce I Ochronie Środowiska, 3(1), 25–28. https://doi.org/10.35784/iapgos.1434
