LOW POWER PROTOTYPE OF THE INTEGRATED CIRCUIT WITH DUAL-STAGE PULSE PROCESSING FOR TIME AND AMPLITUDE MEASUREMENT
Krzysztof Kasiński
krzysztof.kasinski@agh.edu.plAGH University of Science and Technology (Poland)
Rafał Kłeczek
AGH University of Science and Technology (Poland)
Abstract
This paper presents the prototype of the application specific integrated circuit designed for a silicon detector with large capacitance. The measured quantities are: the interaction time and the deposited charge. The aim of this project is to observe the influence of increasing sensor capacitance (up to tens of pF) on operation and performance of the dual-stage analog front-end electronics based on the concept of the Time-over-Threshold processing method.
Keywords:
application specific integrated circuits, semiconductor detectors, charge-sensitive amplifiersReferences
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Kasiński K., Szczygieł R., Gryboś P.: TOT01, a time-over-threshold based readout chip in 180 nm CMOS technology for silicon strip detectors. JINST Journal of Instrumentation 2011 vol. 6 s. 1-6.
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Authors
Krzysztof Kasińskikrzysztof.kasinski@agh.edu.pl
AGH University of Science and Technology Poland
Authors
Rafał KłeczekAGH University of Science and Technology Poland
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