Reconfigured CoARX architecture for implementing ARX hashing in microcontrollers of IoT systems with limited resources

This paper presents CoARX – a reconfigurable coarse-grained architecture tailored for the efficient implementation of ARX-based hash functions in resource-constrained IoT microcontrollers. The architecture is designed to support various cryptographic algorithms based on addition, rotation, and XOR operations, offering a balance between performance, energy efficiency, and hardware simplicity. CoARX employs configurable processing elements with local memory, adaptive routing, and support for both 32-bit and 64-bit operations, making it suitable for implementing lightweight hash functions such as Skein-512, BLAKE-256, and ChaCha20. The study introduces a set of configuration templates enabling dynamic switching between cryptographic modes without modifying the hardware structure. For each algorithm, specific optimization strategies are proposed, including staggered round scheduling for Skein, SIMD-based vector masks for BLAKE, and memoryless route switching for ChaCha20. The dataflow between clusters is optimized using parallel graph decomposition and cluster overlap to minimize routing delays. Experimental results demonstrate that CoARX achieves up to 35% higher performance compared to FPGA-based solutions and over twofold improvement compared to STM32 implementations. The architecture also reduces energy consumption by up to 3× and minimizes memory footprint by 30–60%, depending on the algorithm. These advantages make CoARX a promising platform for secure data processing in embedded and real-time IoT systems operating under limited energy and memory constraints.